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ISL9007
Datasheet October 13, 2005 FN9218.0
High Current LDO with Low IQ and High PSRR
ISL9007 is a high performance LDO that delivers a continuous 400mA of load current. It has a low standby current and high PSRR and is stable with output capacitance of 1F to 10F with an ESR of up to 200m. The ISL9007 has a very high PSRR of 75dB and output noise less than 30VRMS. When coupled with a no load quiescent current of 50A (typical), and 1A (max) shutdown current, the ISL9007 is an ideal choice for portable wireless equipment. The ISL9007 comes in fixed voltage options of 3.3V, 2.85V, 2.8V, and 2.5V with 1.8% output voltage accuracy over temperature, line and load. Other voltage options are available on request.
Features
* High performance LDO with 400mA continuous output * Excellent transient response to large current steps * Excellent load regulation: <0.1% voltage change across full range of load current * Very high PSRR: 75dB @ 1kHz * Wide input voltage capability: 2.3V -6.5V * Very low quiescent current: 50A * Low dropout voltage: typically 200mV @ 400mA * Low output noise: typically 30Vrms @ 100A(2.5V) * Stable with 1-10F ceramic capacitors * Shutdown pin turns off LDO for 1A (max) standby current * Soft-start to limit input current surge during enable
Pinout
ISL9007 (8 Ld MSOP) TOP VIEW
VO NC NC NC VI VI SD GND
* Current limit and overheat protection * 1.8% accuracy over all operating conditions * 8 Ld MSOP package * -40C to +85C operating temperature range * Pb-free plus anneal available (RoHS compliant)
Applications
* PDAs, Cell Phones and Smart Phones * Portable Instruments, MP3 Players * Handheld Devices including Medical Handhelds
Ordering Information
PART NUMBER ISL9007IUNZ* (Note 2) ISL9007IUKZ* (Note 2) ISL9007IUJZ* (Note 2) ISL9007IUFZ* (Note 2) *Add "-T" suffix for tape and reel. NOTES: 1. For other output voltages, contact Intersil Marketing. 2. Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. PART MARKING 007NZ 007KZ 007JZ 007FZ VO VOLTAGE (Note 1) 3.3V 2.85V 2.8V 2.5V TEMP RANGE (C) -40 to +85 -40 to +85 -40 to +85 -40 to +85 PACKAGE 8 Ld MSOP (Pb-free) 8 Ld MSOP (Pb-free) 8 Ld MSOP (Pb-free) 8 Ld MSOP (Pb-free) PKG. DWG. # M8.118 M8.118 M8.118 M8.118
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CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright (c) Intersil Americas Inc. 2005. All Rights Reserved. All other trademarks mentioned are the property of their respective owners.
ISL9007
Absolute Maximum Ratings
Supply Voltage (VIN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +7.1V All Other Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to (VIN+0.3)V
Thermal Information
Thermal Resistance (Notes 3, 4) JA (C/W) 8 Ld MSOP Package . . . . . . . . . . . . . . . . . . . . . . . . 157 Junction Temperature Range -40C to +125C Operating Temperature Range . . . . . . . . . . . . . . . . .-40C to +85C Storage Temperature Range . . . . . . . . . . . . . . . . . .-65C to +150C Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . +300C
Recommended Operating Conditions
Ambient Temperature Range (TA) . . . . . . . . . . . . . . .-40C to +85C Supply Voltage (VIN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.3 to 6.5V
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES: 3. JA is measured in free air with the component mounted on a high effective thermal conductivity test board with "direct attach" features. See Tech Brief TB379. 4. JC, "case temperature" location is at the center of the exposed metal pad on the package underside. See Tech Brief TB379.
Electrical Specifications
Unless otherwise noted, all parameters are guaranteed over the operational supply voltage and temperature range of the device as follows: TA = -40C to +85C; VIN = (VO + 0.5V) to 6.5V with a minimum VIN of 2.3V; CIN = 1F; CO = 1F SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
PARAMETER DC CHARACTERISTICS Supply Voltage Ground Current Shutdown Current UVLO Threshold
VIN IDD IDDS VUV+ VUVQuiescent condition: IO = 0A @25C
2.3 50 0.1 1.9 1.6 Initial accuracy at VIN = VO + 0.5V, IO = 10mA, TJ = 25C VIN = VO + 0.5V to 5.5V, IO = 10A to 400mA, TJ = 25C VIN = VO + 0.5V to 5.5V, IO = 10A to 400mA, TJ = -40C to 125C -0.7 -0.8 -1.8 400 470 IO = 400mA; 2.5V VO 2.8V IO = 400mA; 2.8V < VO 540 250 200 145 110 2.1 1.8
6.5 70 1.0 2.3 2.0 +0.7 +0.8 +1.8
V A A V V % % % mA
Regulation Voltage Accuracy
Maximum Output Current Internal Current Limit Drop-out Voltage (Note 6)
IMAX ILIM VDO1 VDO2
Continuous
750 400 325
mA mV mV C C
Thermal Shutdown Temperature
TSD+ TSD-
AC CHARACTERISTICS Ripple Rejection (Note 5) IO = 10mA, VIN = 2.8V(min), VO = 1.8V @ 1kHz @ 10kHz @ 100kHz Output Noise Voltage (Note 5) DEVICE START-UP CHARACTERISTICS Device Enable TIme LDO Soft-start Ramp Rate TEN TSSR Time from assertion of the ENx pin to when the output voltage reaches 95% of the VO (nom) Slope of linear portion of LDO output voltage ramp during start-up 250 30 500 60 s s/V IO = 100A, VO = 1.5V, TA = 25C BW = 10Hz to 100kHz 75 60 40 40 dB dB dB Vrms
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ISL9007
Electrical Specifications
Unless otherwise noted, all parameters are guaranteed over the operational supply voltage and temperature range of the device as follows: TA = -40C to +85C; VIN = (VO + 0.5V) to 6.5V with a minimum VIN of 2.3V; CIN = 1F; CO = 1F (Continued) SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
PARAMETER SD PIN CHARACTERISTICS Input Low Voltage Input High Voltage Input Leakage Current Pin Capacitance NOTES:
VIL VIH IIL, IIH CPIN Informative
-0.3 1.4
0.4 VIN+0.3 0.1 5
V V A pF
5. Guaranteed by design and characterization. 6. VO-x = 0.98 * VO-x(NOM).
Typical Performance Curves
0.8 0.6 OUTPUT VOLTAGE, VO (%) 0.4 0.2 -40C 0.0 -0.2 -0.4 -0.6 -0.8 25C VO = 3.3V IL = 0mA 0.10 0.08 OUTPUT VOLTAGE CHANGE (%) 0.06 0.04 0.02 0.00 -0.02 -0.04 -0.06 -0.08 3.4 3.8 4.2 4.6 5.0 5.4 5.8 6.2 6.6 -0.10 0 50 100 150 200 250 300 350 400 +85C 25C -40C VIN = 3.8V VO = 3.3V
+85C
INPUT VOLTAGE (V)
LOAD CURRENT - IO (mA)
FIGURE 1. OUTPUT VOLTAGE vs INPUT VOLTAGE (3.3V OUTPUT)
FIGURE 2. OUTPUT VOLTAGE vs LOAD CURRENT
0.10 0.08 0.06 OUTPUT VOLTAGE (%) 0.04 0.02 0.00 -0.02 -0.04 -0.06 -0.08 -0.10 -40 -25 -10 5 20 35 50 65 TEMPERATURE (C) 80 95 110 125 VIN = 3.8V VO = 3.3V IL = 0mA OUTPUT VOLTAGE, VO (V)
3.4 IO = 0mA VO = 3.3V
3.3
3.2 IO = 150mA 3.1 IO = 300mA 3.0
2.9
2.8
3.1
3.6
4.1
4.6
5.1
5.6
6.1
6.5
INPUT VOLTAGE (V)
FIGURE 3. OUTPUT VOLTAGE vs TEMPERATURE
FIGURE 4. OUTPUT VOLTAGE vs INPUT VOLTAGE (3.3V OUTPUT)
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ISL9007 Typical Performance Curves
2.9 IO = 0mA 2.8 OUTPUT VOLTAGE, VO (V) VO = 2.8V DROP OUT VOLTAGE, VDO (mV) 350 300 250 200 VO = 2.8V 150 100 50 0 0 50 100 150 200 250 OUTPUT LOAD (mA) 300 350 400 VO = 3.3V
2.7 IO = 150mA 2.6 IO = 300mA 2.5
2.4
2.3
2.6
3.1
3.6
4.1
4.6
5.1
5.6
6.1
6.5
INPUT VOLTAGE (V)
FIGURE 5. OUTPUT VOLTAGE vs INPUT VOLTAGE (2.8V OUTPUT)
350 VO = 3.3V DROP OUT VOLTAGE, VDO (mV) 300 250 200 +85C 150 100 50 0 0 50 100 150 200 250 OUTPUT LOAD (mA) 300 350 400 -40C 25C GROUND CURRENT (A)
FIGURE 6. DROPOUT VOLTAGE vs LOAD CURRENT
80
70 125C 25C 50 -40C
60
40
30 VO = 3.3V IO = 0A 20 3.0 3.5 4.0 4.58 5.0 5.5 6.0 6.5
INPUT VOLTAGE (V)
FIGURE 7. DROPOUT VOLTAGE vs LOAD CURRENT
FIGURE 8. GROUND CURRENT vs INPUT VOLTAGE
80
200 180 160 GROUND CURRENT (A) 140 120 100 80 60 40 20 0 0 50 100 150 200 250 VIN = 3.8V VO = 3.3V 300 350 400 +85C -40C GROUND CURRENT (A) 25C
70
60
50
40 VIN = 3.8V VO = 3.3V IL = 0A -25 -10 5 20 35 50 65 TEMPERATURE (C) 80 95 110 125
30
20 -40
LOAD CURRENT (mA)
FIGURE 9. GROUND CURRENT vs LOAD
FIGURE 10. GROUND CURRENT vs TEMPERATURE
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ISL9007 Typical Performance Curves
VIN = 5.0V VO = 3.3V IL = 300mA CL = 1F 4.3V 3.6V VO = 3.3V IL = 300mA CL = 1F
3 2 1 0 5 0 0 100 200 300 400 500 600
VO1 (V)
VEN (V)
10mV/DIV
700
800
900
1K
TIME (s)
400 s/DIV
FIGURE 11. TURN ON/TURN OFF RESPONSE
FIGURE 12. LINE TRANSIENT RESPONSE, 3.3V OUTPUT
VO = 2.8V IL = 300mA CL = 1F 4.2V 3.5V VO = 1.8V VIN = 2.8V VO (25mV/DIV)
10mV/DIV
300mA ILOAD 100A
400s/DIV
100s/DIV
FIGURE 13. LINE TRANSIENT RESPONSE, 2.8V OUTPUT
FIGURE 14. LOAD TRANSIENT RESPONSE
100 SPECTRAL NOISE DENSITY (V/Hz) 90 80 70 PSRR (dB) 60 50 40 30 20 10 0 0.1 1 10 100 FREQUENCY (kHz) 1K VIN = 3.5V VO = 2.5V IO = 10mA CL = 1F
10
1
0.1
VIN = 3.6V VO = 1.8V ILOAD = 10mA CIN = 1F CL = 1F
0.01
0.001 10
100
1K 10K FREQUENCY (Hz)
100K
1M
FIGURE 15. PSRR vs FREQUENCY
FIGURE 16. SPECTRAL NOISE DENSITY vs FREQUENCY
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FN9218.0 October 13, 2005
ISL9007 Pin Description
PIN # 1 PIN NAME VO DESCRIPTION LDO Output: Connect capacitor of value 1F to 10F to GND (1F recommended) No Connection GND is the connection to system ground. Connect to PCB Ground plane. LDO Shutdown. When this signal goes high, the LDO is turned off. Supply Voltage/LDO Input: Connect a 1F capacitor to GND. Supply Voltage/LDO Input: Connect a 1F capacitor to GND.
Functional Description
The ISL9007 contains all circuitry required to implement a high performance LDO. High performance is achieved through a circuit that delivers fast transient response to varying load conditions. In a quiescent condition, the ISL9007 adjusts its biasing to achieve the lowest standby current consumption. The device also integrates current limit protection, smart thermal shutdown protection, and soft-start. Smart thermal shutdown protects the device against overheating. Soft-start minimize start-up input current surges without causing execssive device turn-on time.
2, 3, 4 5 6 7 8
NC GND SD VIN VIN
Power Control
The ISL9007 has a shutdown pin, SD, to control power to the LDO output. When SD is high, the device is in shutdown mode. In this condition, all on-chip circuits are off, and the device draws minimum current, typically less than 0.1A. When the SD pin goes low, the device first polls the output of the UVLO detector to ensure that VIN voltage is at least 2.1V (typical). Once verified, the device initiates a start-up sequence. During the start-up sequence, trim settings are first read and latched. Then, sequentially, the bandgap, reference voltage and current generation circuitry turn on. Once the references are stable, the LDO powers up. During operation, whenever the VIN voltage drops below about 1.84V, the ISL9007 immediately disables both LDO outputs. When VIN rises back above 2.1V (assuming the SD pin is low), the device re-initiates its start-up sequence and LDO operation will resume automatically.
Typical Application
ISL9007
VIN (3.0-6.5V) OFF SHUTDOWN ON C1 8 7 6 VIN VIN SD GND 5 C2 VO 1 VOUT
C1, C2: 1F X5R ceramic capacitor
Reference Generation
Block Diagram
The reference generation circuitry includes a trimmed bandgap, a trimmed voltage reference divider, a trimmed current reference generator, and an RC noise filter.
VO
VIN VIN
The bandgap generates a zero temperature coefficient (TC) voltage for the regulator reference and other voltage references required for current generation and overtemperature detection. A current generator provides references required for adaptive biasing as well as references for LDO output current limit and thermal shutdown determination.
UVLO
CONTROL LOGIC
SHORT CIRCUIT, THERMAL PROTECTION, SOFT-START
LDO Regulation and Programmable Output Divider
The LDO Regulator is implemented with a high-gain operational amplifier driving a PMOS pass transistor. The design of the ISL9000 provides a regulator that has low quiescent current, fast transient response, and overall stability across all operating and load current conditions. LDO stability is guaranteed for a 1F to 10F output capacitor that has a tolerance better than 20% and ESR less than 200m. The design is performance-optimized for a 1F capacitor. Unless limited by the application, use of an output
SD
BANDGAP AND TEMPERATURE SENSOR
GND
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ISL9007
capacitor value above 4.7F is not recommended as LDO performance improvement is minimal. Soft-start circuitry integrated into each LDO limits the initial ramp-up rate to about 30s/V to minimize current surge. The ISL9007 provides short-circuit protection by limiting the output current to about 500mA. The LDO uses an independently trimmed 1V reference as its input. An internal resistor divider drops the LDO output voltage down to 1V. This is compared to the 1V reference for regulation. The resistor division ratio is programmed in the factory to one of the following output voltages: 3.3, 2.85V, 2.8V, and 2.5V.
Overheat Detection
The bandgap outputs a proportional-to-temperature current that is indicative of the temperature of the silicon. This current is compared with references to determine if the device is in danger of damage due to overheating. When the die temperature reaches about 145C, the LDO momentarily shuts down until the die cools sufficiently. In the overheat condition, if the LDO sources more than 50mA it will be shut off. Once the die temperature falls back below about 110C, the disabled LDO is re-enabled and soft-start automatically takes place.
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ISL9007 Mini Small Outline Plastic Packages (MSOP)
N
M8.118 (JEDEC MO-187AA)
8 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE
E1 -BE
INCHES SYMBOL A
ABC
MILLIMETERS MIN 0.94 0.05 0.75 0.25 0.09 2.95 2.95 MAX 1.10 0.15 0.95 0.36 0.20 3.05 3.05 NOTES 9 3 4 6 7 15o 6o Rev. 2 01/03
MIN 0.037 0.002 0.030 0.010 0.004 0.116 0.116
MAX 0.043 0.006 0.037 0.014 0.008 0.120 0.120
INDEX AREA
12 TOP VIEW
0.20 (0.008)
A1 A2
4X
0.25 (0.010) GAUGE PLANE SEATING PLANE -CA A2
R1 R
b c D E1
4X
L L1
e E L L1 N R
0.026 BSC 0.187 0.016 8 0.003 0.003 5o 0o 15o 6o 0.199 0.028
0.65 BSC 4.75 0.40 8 0.07 0.07 5o 0o 5.05 0.70
A1
-He D
b
0.10 (0.004) -A0.20 (0.008)
C
SEATING PLANE
0.037 REF
0.95 REF
C a C L E1
C
R1 0
SIDE VIEW
-B-
0.20 (0.008)
CD
END VIEW
NOTES: 1. These package dimensions are within allowable dimensions of JEDEC MO-187BA. 2. Dimensioning and tolerancing per ANSI Y14.5M-1994. 3. Dimension "D" does not include mold flash, protrusions or gate burrs and are measured at Datum Plane. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension "E1" does not include interlead flash or protrusions and are measured at Datum Plane. - H - Interlead flash and protrusions shall not exceed 0.15mm (0.006 inch) per side. 5. Formed leads shall be planar with respect to one another within 0.10mm (0.004) at seating Plane. 6. "L" is the length of terminal for soldering to a substrate. 7. "N" is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. Dimension "b" does not include dambar protrusion. Allowable dambar protrusion shall be 0.08mm (0.003 inch) total in excess of "b" dimension at maximum material condition. Minimum space between protrusion and adjacent lead is 0.07mm (0.0027 inch). 10. Datums -A -H- . and - B - to be determined at Datum plane
11. Controlling dimension: MILLIMETER. Converted inch dimensions are for reference only.
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com 8
FN9218.0 October 13, 2005

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